NewsSynopsys Expands AI-Driven EDA Suite with Generative AI Capabilities for Semiconductor Industry

Synopsys Expands AI-Driven EDA Suite with Generative AI Capabilities for Semiconductor Industry

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Synopsys, Inc. (Nasdaq: SNPS), a leader in electronic design automation (EDA), has announced the expansion of its cutting-edge™ EDA suite. This development introduces the power of generative artificial intelligence (GenAI) across the full stack, aiming to significantly enhance engineering productivity in the semiconductor industry. This move builds upon Synopsys’ recent introduction of Copilot, marking the first of many GenAI capabilities for chip design.

Integrating GenAI Across the EDA Suite

The integration of GenAI within the suite will equip chip designers with collaborative tools offering expert guidance, generative capabilities for RTL, verification, and other collateral creation, and autonomous workflow creation from natural language. Early engagements with leading chip manufacturers such as AMD, Intel, and Microsoft are set to leverage GenAI’s value across the entire EDA stack, spanning design, verification, testing, and manufacturing.

Synopsys’ Commitment to Semiconductor Progress

Shankar Krishnamoorthy, general manager of the Synopsys EDA Group, emphasizes Synopsys’ long-standing commitment to helping chipmakers overcome their most challenging design obstacles. As a pioneer in AI-driven chip design, Synopsys addresses the pressing need for engineering productivity amid talent shortages by incorporating GenAI capabilities into its suite, pushing the boundaries of semiconductor technology.

Features of the Hyperconverged AI-Driven EDA Suite

The EDA suite, already renowned for its AI-driven optimization and data analytics capabilities, is further enhancing chip design workflows. This acceleration allows companies to build more chips faster, despite a workforce not growing in tandem with industry demands. The suite now includes new generative AI capabilities such as:

  • Collaborative tools for tool knowledge guidance, result analysis, and improved EDA workflows.
  • Generative tools for rapid development of RTL, formal verification assertion creation, and UVM testbenches.
  • Autonomous tools for end-to-end workflow creation from natural language, covering architecture, design, and manufacturing.

Industry Leaders Embracing Generative AI Capabilities

Several industry leaders are already benefiting from’s GenAI collaborative and generative capabilities. AMD has adopted these capabilities to accelerate RTL generation and reduce turnaround time for complex design tasks. Intel sees significant potential in automatically generating RTL from natural language specifications to manage increasing chip design complexity. Microsoft is working with Synopsys to integrate GenAI into workflows like formal verification, aiming to expedite the design process from ideation to realization.

Transforming Chip Design with

Synopsys’ expansion of its EDA suite with GenAI capabilities represents a significant advancement in the field of semiconductor design. By harnessing the power of AI, Synopsys is enabling faster, more efficient, and innovative chip design processes, poised to meet the evolving demands of the semiconductor industry.

Michal Pukala
Electronics and Telecommunications engineer with Electro-energetics Master degree graduation. Lightning designer experienced engineer. Currently working in IT industry.