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Revolutionary Transceiver Design Unleashes the Potential of 6G: Over 100 GHz and 112 Gb/s Data Rates Achieved

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A revolutionary transceiver design capable of both transmission and reception at frequencies over 100 GHz and a staggering data rate of 112 Gb/s has been developed by scientists at Tokyo Tech. This groundbreaking achievement not only promises to revolutionize the future of telecommunications but also brings us one step closer to the realization of 6G technologies. By effectively suppressing self-interference, the proposed architecture sets unprecedented data rates while maintaining an unexpectedly compact size, addressing a significant challenge in the field. Let’s explore the advancements made by the Tokyo Tech research team and the potential implications for the future of wireless communication.

Unleashing the Potential of Full-Duplex Architecture

With the race towards 6G in full swing, researchers and engineers in the telecommunications field are actively exploring technologies that can meet the demanding requirements of next-generation networks. To achieve data rates exceeding 100 Gb/s and support ultra-low latencies, one promising approach is adopting a full-duplex (FD) architecture operating at sub-THz frequencies ranging from 88 to 136 GHz.

The Advantages and Hurdles of FD Architecture

Full-duplex architecture allows simultaneous transmission and reception of signals on the same frequency band, effectively doubling the system’s throughput. Traditionally, communication systems were limited to half-duplex, requiring separate time slots for transmitting and receiving. However, FD architecture breaks through this limitation, offering real-time bidirectional communication. Implementing a single-antenna FD architecture can reduce circuit size and maximize frequency spectrum utilization. Yet, self-interference (SI) caused by signal leakage poses a significant challenge for these designs, especially in the sub-THz band.

Tokyo Tech’s Novel Solution to Self-Interference

Researchers from Tokyo Institute of Technology have developed an innovative FD communication system that tackles the hurdles of self-interference head-on. Led by Professor Kenichi Okada, the team will unveil their design at the upcoming 2023 Symposium on VLSI Technology and Circuits. The system incorporates a dual-polarized patch antenna, driven by differential signals, and employs highly symmetrical circuit paths to minimize the mismatch and leakage of the transmitted signal into the receiver ports. This unique design mitigates self-interference, ensuring optimal performance and data integrity.

The Key Role of SI Cancellation

An essential aspect of the proposed transceiver design is the self-interference cancellation (SIC) circuit. Effective SI cancellation requires precise modification of the cancellation signal’s phase to be opposite to that of the leaked signal. Conventional varactors face limitations in the sub-THz range, such as a restricted phase range and poor resolution. To overcome this hurdle, the Tokyo Tech researchers developed a novel varactor structure with exceptional linear resolution across the entire sub-THz band, covering a full 360° range. This breakthrough enables efficient and accurate SI cancellation, further enhancing the system’s performance.

Promising Results and Future Implications

Through rigorous experimentation, the Tokyo Tech team achieved remarkable results with their transceiver design. The proposed FD architecture achieved a data rate of 6 Gb/s in over-the-air measurements, showcasing its potential for high-speed wireless communication. When the self-interference canceller was activated, the system experienced a significant improvement of 20 decibels in self-interference suppression. Furthermore, as the world’s first FD phased-array transceiver operating at frequencies over 100 GHz, the device attained an impressive data rate of 112 Gb/s in HD mode, surpassing all previous sub-THz phased-array transceivers.

With its compact size, wide range of operating frequencies, and groundbreaking data rates, the Tokyo Tech research team’s transceiver design represents a significant leap forward in telecommunications technology for 6G networks. As the world eagerly awaits the future of wireless communication, this remarkable achievement paves the way for revolutionary advancements in autonomous vehicles, virtual reality, and countless other applications that rely on ultra-high data rates and minimal latency.

Michal Pukala
Electronics and Telecommunications engineer with Electro-energetics Master degree graduation. Lightning designer experienced engineer. Currently working in IT industry.